Active Cache & Memory Virtualization on CPU and Memory Devices (MJK-03-1)

Flexible and maximum utilization of cache memory and main memory system that allows reconfigurable, dynamic cache and works varies operation based on application demand from external/hybridized cores. The functionality included the multiple memory processing elements (MPEs) collaborate to ‘lease’ memory or assist in processing.

Note: Sam Sung Electronics, LG Electronics & Pantech have licensed these patents.

8 Assets

Multi-core active memory processor system

Inventor Moon J. Kim
Original Assignee IP Cube Partners (ICP) Co Ltd
Priority date 2010-11-24

In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode. The system is further configured to delegate computational or memory resource needs to a plurality of sub-processing cores for processing to satisfy application demands.

Hybrid active memory processor system

Inventor Moon J. Kim
Original Assignee IP Cube Partners (ICP) Co Ltd
Priority date 2010-11-29

In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode. The present invention is further configured to enable processing core and memory utilization by external systems through virtualization.

Authorizing the use of a transaction card

Inventor Moon J. Kim
Original Assignee Moon J. Kim
Priority date 2011-05-05

Embodiments of the present invention provide systems and methods for validating a user of a transaction card. Specifically, embodiments of the present invention utilize dynamic manipulation of a transaction card to authorize use of the card. In a typical embodiment, the cardholder approaches a magnetic reader with the card. The card is powered up by an embedded radio frequency identification (RFID) antenna in a magnetic field. The cardholder enters a user authorization code using an input method. The entry is compared against the predefined user authorization code. If the entry is invalid, an unauthorized code is put on virtual ferromagnetic cells (VFC) embedded in the card. If the entry is valid, legitimate card information is put into the VFC. When the card is swiped, magnetic information on the VFC is coupled, amplified, and recorded to the reader. After cardholder use, the VFC are reset to a random or unauthorized mode.

Active memory processor system

Inventor Moon J. Kim
Original Assignee IP Cube Partners (IPC) Co Ltd
Priority date 2010-11-23

In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode.

Multi-core active memory processor system

Inventor Moon J. Kim
Original Assignee IP Cube Partners (ICP) Co Ltd
Priority date 2010-11-24

In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode. The system is further configured to delegate computational or memory resource needs to a plurality of sub-processing cores for processing to satisfy application demands.

Active memory processor system

Inventor Moon J. Kim
Original Assignee IP Cube Partners (IPC) Co Ltd
Priority date 2010-11-23

In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode.

Active memory processor system

Inventor Moon J. Kim
Original Assignee IP Cube Partners (ICP) Co Ltd
Priority date 2010-11-23

In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode.

Active memory processor system

Inventor Moon J. Kim
Original Assignee IP Cube Partners (ICP) Co Ltd
Priority date 2010-11-23

In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode.

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